VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader for ADSP-2126x/2136x/2137x SHARC Processors
sor. On the following SPICLK cycle (cycle 32), the processor expects the
first bit of the first word of the boot stream. This transfer continues until
the boot kernel has finished loading the user program into the processor.
Figure 5-1. SPI Master Mode Booting Using Various Serial Devices
Bit-Reverse Option for SPI Boot Modes
SPI PROM. For the SPI PROM boot type, the entirety of the SPI master
.ldr file needs the option of bit-reversing when loading to SPI PROMs.
This is because the default setting for the SPICTL register (see Table 5-8 on
page 5-11) sets the bit order to be LSB first. SPI EPROMs are usually
MSB first, so the .ldr file must be sent in bit-reversed order.
VisualDSP++ 4.5 Loader and Utilities Manual 5-13