VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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ADSP-2126x/2136x/2137x Processor Booting INIT_L48 Blocks The INIT_L48 block has one packing and one padding requirements. First, there must be an even number of 48-bit words in the block. If there is an odd number of instructions, then the loader utility must append one additional 48-bit instruction that is all zeros. In all cases, the count placed into the header is the original logical number of words. That is, the count does not include the padded word. Once the number of words in the block is even, the data in this block is packed according to Table 5-13. The table also shows the case where one zero-word must be added. Table 5-13. INIT_L48 Block Packing and Zero-Padding (ASCII Format) Original Data Packed into an Even Number of 32-bit Words -hostwidth 32 16 8 111122223333 22223333 22223333 3333 33 444455556666 66661111 55551111 2222 33 AAAABBBBCCCC 44445555 44445555 1111 22 BBBBCCCC BBBBCCCC 6666 22 0000AAAA 0000AAAA 5555 11 00000000 00000000 4444 11 CCCC 66 BBBB 66 AAAA 55 0000 55 0000 44 0000 44 5-26 VisualDSP++ 4.5 Loader and Utilities Manual CC CC BB
Loader for ADSP-2126x/2136x/2137x SHARC Processors Table 5-13. INIT_L48 Block Packing and Zero-Padding (ASCII Format) Original Data Packed into an Even Number of 32-bit Words INIT_L16 Blocks For 16-bit initialization blocks, the number of 16-bit words in the block must be even. If an odd number of 16-bit words is in the block, then the loader utility adds one additional word (all zeros) to the end of the block, as shown in Table 5-14. The count stored in the header is the actual number of 16-bit words. (The count does not include the padded word.) Table 5-14. INIT_L16 Block Packing and Zero-Padding (ASCII Format) Original Data Packed into an Even Number of 32-bit Words -hostwidth 32 16 8 -hostwidth 32 16 8 1122 33441122 33441122 1122 22 3344 00005566 00005566 3344 11 5566 5566 44 VisualDSP++ 4.5 Loader and Utilities Manual 5-27 BB AA AA 00 00 00 00 00 00 0000 33 66
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Analog Devices, Inc. One Technology
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CONTENTS PREFACE Purpose of This Ma
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CONTENTS Loader Files Without a Sec
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CONTENTS ADSP-BF535 and ADSP-BF531/
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Contents File Extensions ..........
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Contents Boot Type Selection ......
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PREFACE Thank you for purchasing Vi
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Technical or Customer Support Prefa
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ADSP-21367 ADSP-21368 ADSP21369 ADS
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Preface VisualDSP++ 4.5 C/C++ Compi
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VisualDSP++ Documentation Set Prefa
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1 INTRODUCTION The majority of this
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Loader Command Line Introduction If
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Initialization Code Introduction In
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A brief description of each phase f
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Introduction Download the loadable
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Introduction You can run the loader
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PROM Boot Mode Introduction After r
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Boot Streams Introduction The loade
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2 LOADER/SPLITTER FOR BLACKFIN PROC
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Loader/Splitter for Blackfin Proces
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System Reset Configuration Register
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D7 OUTPUT .LDR FILE 4-BYTE HEADER F
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Second-Stage Loader Restrictions Lo
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SPI Memory Detection Routine Loader
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P0.H = HI(EBIU_SDRRC); R0 = 0x074A(
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� Booting � SDRAM ADSP-BF536 pr
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1-0-Byte Block Header Block Data Lo
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� The Core B Loader/Splitter for
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INITIALIZATION CODE (KERNEL WITH DE
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FLASH MEMORY INIT CODE HEADER INIT
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where: � Command-line File Search
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Blackfin Loader Command-Line Switch
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Using Base Loader Loader/Splitter f
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Table 2-11. Base Load Page Settings
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Using Second-Stage Loader Loader/Sp
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3 LOADER FOR ADSP-2106X/21160 SHARC
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Loader for ADSP-2106x/21160 SHARC P
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Boot Mode Selection Loader for ADSP
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File Searches Loader for ADSP-2106x
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-si-revision #|none|any Loader for
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4 LOADER FOR ADSP-21161 SHARC PROCE
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Loader for ADSP-21161 SHARC Process
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Loader for ADSP-21161 SHARC Process
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Page 169 and 170: ADSP-21161 Processor Boot Streams L
Page 171 and 172: To Modify a Boot Kernel Source File
Page 175 and 176: Processor ID Numbers Loader for ADS
Page 179 and 180: File Searches Loader for ADSP-21161
Page 185 and 186: 5 LOADER FOR ADSP-2126X/2136X/2137X
Page 187 and 188: Loader for ADSP-2126x/2136x/2137x S
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Page 227 and 228: File Searches Loader for ADSP-2126x
Page 235 and 236: 6 LOADER FOR TIGERSHARC PROCESSORS
Page 237 and 238: � EE-174: Loader for TigerSHARC P
Page 239 and 240: Boot Kernel Modification Loader for
Page 241 and 242: Loader for TigerSHARC Processors el
Page 243 and 244: TigerSHARC Command-Line Switches Lo
Page 245 and 246: Loader for TigerSHARC Processors Ta
Page 247 and 248: 7 SPLITTER FOR SHARC AND TIGERSHARC
Page 249 and 250: � Most Splitter for SHARC and Tig
Page 251 and 252: Splitter for SHARC and TigerSHARC P
Page 257 and 258: A FILE FORMATS VisualDSP++ developm
Page 259 and 260: Assembly Source Files File Formats
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Build Files File Formats Build file
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Memory Map Files File Formats The l
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Table A-4. End-of-File Record Examp
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This example shows how to include t
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Table A-7. S1 Termination Record Ex
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File Formats A block of data record
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Table A-9. SPORT Data File Example
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B UTILITIES The VisualDSP++ develop
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elf2flt - ELF to BFLT File Converte
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Table B-3. BFLT File Dumper Command
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I INDEX Numerics -64 splitter switc
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BMS pins ADSP-2106x/160 processors,
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data initialization files (.dat), A
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external memory (SHARC processors)
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initialization blocks (Blackfin pro
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loader file formats (ADSP-BF535 pro
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P -p # loader switch for Blackfin,
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shared memory Blackfin processors,
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V .VAR directive, A-3 vector addres
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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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