VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

ADSP-2126x/2136x/2137x Processor Booting
The SPI DMA channel is used when downloading the boot kernel information
to the processor. At reset, the DMA parameter registers are
initialized to the values listed in Table 5-6.
Table 5-6. Parameter Register Settings for SPI Slave Boot
Parameter Register Initialization Value Comment
SPICTL 0x0000 4D22
SPIDMAC 0x0000 0007 Enabled, RX, initialized on completion
IISPI 0x0008 0000 Start of block 0 normal word memory
IMSPI 0x0000 0001 32-bit data transfers
CSPI 0x0000 0180
SPI Master Boot Modes
In SPI master boot mode, the ADSP-2126x/2136x/2137x processor initiates
the booting operation by:
1. Activating the SPICLK signal and asserting the FLG0 signal to the
active low state.
2. Writing the read command 0x03 and address 0x00 to the slave
device.
SPI master boot mode is used when the processor is booting from an SPI
compatible serial PROM, serial flash, or slave host processor. The specifics
of booting from these devices are discussed individually:
“Booting From an SPI Flash” on page 5-16
“Booting From an SPI PROM (16-bit address)” on page 5-16
“Booting From an SPI Host Processor” on page 5-17
On reset, the interface starts up in SPI master mode performing a three
hundred eighty-four 32-bit word DMA transfer.
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