VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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ADSP-2126x/2136x/2137x Processor Booting To omit an initial word of 0xa5. When -nokernel is selected, the loader utility does not place an initial word (A5) in the boot stream as required for SPI master booting. To replace the FINAL_INIT block with a USER_MESG header. The FINAL_INIT block (which typically contains the IVT code) should not be included in the .ldr file because the contents of the IVT (if any) is incorporated in the boot-stream. Instead, the loader utility appends one final bock header to terminate the loader file. The final block header has a block tag of 0x0 (USER_MESG). The header indicates to a subroutine processing the boot stream that this is the end of the stream. The header contains two 32-bit data words, instead of count and address information (unlike the other headers). The words can be used to provide version number, error checking, additional commands, return addresses, or a number of other messages to the importing subroutine on the processor. The two 32-bit values can be set on the command line as arguments to the “-nokernel[message1, message2]” switch. The first optional argument is msg_word1, and the second optional argument is msg_word2, where the values are interpreted as 32-bit unsigned numbers. If only one argument is issued, that argument is msg_word1. It is not possible to specify msg_word2 without specifying msg_word1.) If one or no arguments are issued at the command line, the default values for the arguments are 0x00000000. Listing 5-1 shows a sample format for the USER_MESG header. Listing 5-1. Internal Booting: FINAL_INIT Block Header Format 0x00000000 /* USER_MESG tag */ 0x00000000 /* msg_word1 (1st cmd-line parameter) */ 0x00000000 /* msg_word2 (2nd cmd-line parameter) */ 5-18 VisualDSP++ 4.5 Loader and Utilities Manual
Loader for ADSP-2126x/2136x/2137x SHARC Processors ADSP-2126x/2136x/2137x Processors Boot Kernels The boot-loading process starts with a transfer of the boot kernel program into the processor memory. The boot kernel sets up the processor and loads boot data. After the boot kernel finishes initializing the rest of the system, the boot kernel loads boot data over itself with a final DMA transfer. Table 5-11 lists ADSP-2126x/2136x boot kernels shipped with VisualDSP++. Table 5-11. ADSP-2126x/2136x Default Boot Kernel Files Processor PROM SPI Slave, SPI Flash, SPI Master, SPI PROM ADSP-2126x 26x_prom.dxe 26x_spi.dxe ADSP-21362, ADSP-21363, ADSP-21364, ADSP-21365, ADSP-21366 ADSP-21367, ADSP-21368, ADSP-21369, ADSP-2137x, 36x_prom.dxe 36x_spi.dxe 369_prom.dxe 369_spi.dxe At processor reset, a boot kernel is loaded into the seg_ldr memory segment as defined in the Linker Description File for the default loader kernel that corresponds to the target processor, for example, 2126x_ldr.ldf, which is stored in the tools installation directory …\2126x\ldr. VisualDSP++ 4.5 Loader and Utilities Manual 5-19
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Analog Devices, Inc. One Technology
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CONTENTS PREFACE Purpose of This Ma
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CONTENTS Loader Files Without a Sec
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CONTENTS ADSP-BF535 and ADSP-BF531/
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Contents File Extensions ..........
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Contents Boot Type Selection ......
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PREFACE Thank you for purchasing Vi
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Technical or Customer Support Prefa
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ADSP-21367 ADSP-21368 ADSP21369 ADS
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Preface VisualDSP++ 4.5 C/C++ Compi
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VisualDSP++ Documentation Set Prefa
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1 INTRODUCTION The majority of this
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Loader Command Line Introduction If
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Initialization Code Introduction In
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A brief description of each phase f
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Introduction Download the loadable
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Introduction You can run the loader
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PROM Boot Mode Introduction After r
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Boot Streams Introduction The loade
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2 LOADER/SPLITTER FOR BLACKFIN PROC
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Loader/Splitter for Blackfin Proces
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System Reset Configuration Register
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D7 OUTPUT .LDR FILE 4-BYTE HEADER F
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Second-Stage Loader Restrictions Lo
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SPI Memory Detection Routine Loader
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P0.H = HI(EBIU_SDRRC); R0 = 0x074A(
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� Booting � SDRAM ADSP-BF536 pr
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1-0-Byte Block Header Block Data Lo
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� The Core B Loader/Splitter for
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INITIALIZATION CODE (KERNEL WITH DE
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FLASH MEMORY INIT CODE HEADER INIT
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where: � Command-line File Search
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Blackfin Loader Command-Line Switch
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Using Base Loader Loader/Splitter f
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Table 2-11. Base Load Page Settings
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Using Second-Stage Loader Loader/Sp
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3 LOADER FOR ADSP-2106X/21160 SHARC
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Loader for ADSP-2106x/21160 SHARC P
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Boot Mode Selection Loader for ADSP
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File Searches Loader for ADSP-2106x
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Page 151 and 152: -si-revision #|none|any Loader for
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Page 169 and 170: ADSP-21161 Processor Boot Streams L
Page 171 and 172: To Modify a Boot Kernel Source File
Page 175 and 176: Processor ID Numbers Loader for ADS
Page 179 and 180: File Searches Loader for ADSP-21161
Page 185 and 186: 5 LOADER FOR ADSP-2126X/2136X/2137X
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Page 227 and 228: File Searches Loader for ADSP-2126x
Page 235 and 236: 6 LOADER FOR TIGERSHARC PROCESSORS
Page 237 and 238: � EE-174: Loader for TigerSHARC P
Page 239 and 240: Boot Kernel Modification Loader for
Page 241 and 242: Loader for TigerSHARC Processors el
Page 243 and 244: TigerSHARC Command-Line Switches Lo
Page 245 and 246: Loader for TigerSHARC Processors Ta
Page 247 and 248: 7 SPLITTER FOR SHARC AND TIGERSHARC
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Splitter for SHARC and TigerSHARC P
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Splitter for SHARC and TigerSHARC P
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A FILE FORMATS VisualDSP++ developm
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Assembly Source Files File Formats
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Build Files File Formats Build file
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Memory Map Files File Formats The l
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Table A-4. End-of-File Record Examp
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This example shows how to include t
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Table A-7. S1 Termination Record Ex
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File Formats A block of data record
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Table A-9. SPORT Data File Example
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B UTILITIES The VisualDSP++ develop
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elf2flt - ELF to BFLT File Converte
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Table B-3. BFLT File Dumper Command
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I INDEX Numerics -64 splitter switc
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BMS pins ADSP-2106x/160 processors,
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data initialization files (.dat), A
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external memory (SHARC processors)
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initialization blocks (Blackfin pro
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loader file formats (ADSP-BF535 pro
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P -p # loader switch for Blackfin,
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shared memory Blackfin processors,
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V .VAR directive, A-3 vector addres
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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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