VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Loader/Splitter for Blackfin Processors
uated completely. Therefore, a pulling resistor on the HWAIT signal is
recommended. If the resistor pulls down to ground, the host is always permitted
to send when the HWAIT signal is low and must pause transmission
when HWAIT is high. The Blackfin UART module does not provide
extremely large receive FIFOs, so the host is requested to test HWAIT at
every transmitted byte.
As indicated in Figure 2-25, the HWAIT feedback may connect to the
clear-to-send (CTS) input of an EIA-232E compatible host device, resulting
in a subset of a so-called hardware handshake protocol. The host is
requested to interrogate the HWAIT signal before every individual byte. At
boot time the Blackfin processor does not evaluate any request-to-send
(RTS) signal driven by the host.
Figure 2-25. UART Slave Boot Mode
VisualDSP++ 4.5 Loader and Utilities Manual 2-31