VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices
VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices
VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
data<br />
initialization files (.dat), A-3<br />
memory (dm) sections, 7-3, 7-5<br />
records in Intel hex-32 format, A-7<br />
transfers, See DMA transfers<br />
DATA15-0 pins, 3-12<br />
DATA23-16 pins, 3-7, 4-6<br />
DATA31-16 pins, 3-12<br />
DATA39-32 pins, 3-7<br />
DATA47-16 pins, 3-12<br />
DATA63-32 pins, 3-12<br />
DATA64 memory sections, 7-3, 7-5<br />
DATA7-0 pins, 3-7, 3-12<br />
data banks (Blackfin processors)<br />
ADSP-BF531/2/3/4/6/7/8/9 processors,<br />
2-40<br />
ADSP-BF535 processors, 2-14<br />
ADSP-BF561/6 processors, 2-54<br />
DataFlash devices, 2-17, 2-26<br />
data packing (SHARC processors)<br />
ADSP-2106x/160 processors, 3-9, 3-10,<br />
3-11, 3-12, 3-15<br />
ADSP-21161 processors, 4-5, 4-9<br />
ADSP-2126x/36x/37x processors, 5-6,<br />
5-26, 5-27<br />
data streams<br />
encrypting from application, 2-66<br />
encrypting from kernel, 2-68<br />
.dat (data) initialization files, A-3<br />
debugger file formats, 1-8, A-16<br />
debugging targets, 1-8<br />
decompression<br />
initialization files, 2-60<br />
kernel files, 5-40<br />
DEN register, 4-7, 4-11<br />
.dlb (library) files, A-6<br />
-dm, splitter switch, 7-5<br />
INDEX<br />
DMA (ADSP-2106x/160 processors)<br />
channels, See channels by name<br />
(DMACx)<br />
buffers, 3-13<br />
channel control registers, 3-10, 3-12,<br />
3-13, 3-14, 3-15, 3-16<br />
channel interrupts, 3-13, 3-14, 3-15<br />
channel parameter registers, 3-8, 3-9,<br />
3-11, 3-12, 3-16<br />
controller, 3-2, 3-8, 3-9, 3-11<br />
transfers, 3-10, 3-11, 3-12, 3-13, 3-16,<br />
3-18<br />
DMA (ADSP-21161 processors)<br />
channels, See channels by name<br />
(DMACx)<br />
buffers, 4-22<br />
channel control registers, 4-5, 4-6, 4-9,<br />
4-10, 4-11, 4-16<br />
channel interrupts, 4-9, 4-12<br />
channel parameter registers, 4-7, 4-9,<br />
4-11, 4-12, 4-13, 4-15, 4-16<br />
controller, 4-5, 4-7, 4-9<br />
transfers, 4-3, 4-8, 4-15, 4-16, 4-21<br />
DMA (ADSP-2126x/36x/37x processors)<br />
code example, 5-30<br />
parallel port channels, 5-6, 5-25<br />
parameter registers, 5-6, 5-9, 5-11, 5-31<br />
SPI channels, 5-10, 5-11<br />
transfers, 5-5, 5-8, 5-10, 5-19<br />
DMAC0 channel (ADSP-2106x/160<br />
processors), 3-3, 3-8, 3-12<br />
DMAC10 channels<br />
ADSP-2106x/160 processors, 3-2, 3-3,<br />
3-8, 3-9, 3-12, 3-15<br />
ADSP-21161 processors, 4-5, 4-6, 4-7,<br />
4-9, 4-10<br />
DMAC6 channel (ADSP-2106x/160<br />
processors), 3-2, 3-3, 3-8, 3-9, 3-12,<br />
3-15<br />
<strong>VisualDSP++</strong> <strong>4.5</strong> <strong>Loader</strong> <strong>and</strong> <strong>Utilities</strong> <strong>Manual</strong> I-5
Change language