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VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

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<strong>Loader</strong> for ADSP-21161 SHARC Processors<br />

Table 4-10. ADSP-21161 <strong>Loader</strong> Comm<strong>and</strong> Line Switches (Cont’d)<br />

Switch Description<br />

-si-revision #|none|any The -si-revision {#|none|any} switch provides a silicon revision<br />

of the specified processor.<br />

The switch parameter represents a silicon revision of the processor<br />

specified by the -proc processor switch. The parameter takes<br />

one of three forms:<br />

The none value indicates that the <strong>VisualDSP++</strong> ignores<br />

silicon errata.<br />

The # value indicates one or more decimal digits, followed<br />

by a point, followed by one or two decimal digits.<br />

Examples of revisions are: 0.0; 1.12; 23.1. Revision<br />

0.1 is distinct from <strong>and</strong> “lower” than revision 0.10.<br />

The digits to the left of the point specify the chip tapeout<br />

number; the digits to the right of the point identify<br />

the metal mask revision number. The number to the<br />

right of the point cannot exceed decimal 255.<br />

The any value indicates that <strong>VisualDSP++</strong> produces an<br />

output file that can be run at any silicon revision.<br />

The switch generates either a warning about any potential anomalous<br />

conditions or an error if any anomalous conditions occur.<br />

In the absence of the silicon revision switch, the loader utility<br />

selects the greatest silicon revision it is aware of, if any.<br />

� In<br />

the absence of the switch parameter (a valid revision<br />

value)—-si-revision alone or with an<br />

invalid value—the loader utility generates an error.<br />

-t# (Host boot type only) Specifies timeout cycles. The -t switch (for<br />

example, -t100) limits the number of cycles that the processor<br />

spends initializing external memory with zeros. Valid values range<br />

from 3 to 32765 cycles; 32765 is the default value.<br />

The timeout value (#) is related directly to the number of cycles<br />

the processor locks the bus for boot-loading, instructing the processor<br />

to lock the bus for no more than two times the timeout<br />

number of cycles. When working with a fast host that cannot tolerate<br />

being locked out of the bus, use a relatively small timeout<br />

value.<br />

<strong>VisualDSP++</strong> <strong>4.5</strong> <strong>Loader</strong> <strong>and</strong> <strong>Utilities</strong> <strong>Manual</strong> 4-31

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