VisualDSP++ 4.5 Loader and Utilities Manual - Analog Devices

Boot Mode Selection
Loader for ADSP-2106x/21160 SHARC Processors
The state of various pins selects the processor boot mode. For
ADSP-21060, ADSP-21061, ADSP-21062, and ADSP-21160 processors,
refer to Table 3-3 and Table 3-4. For ADSP-21065L processors, refer to
Table 3-5 and Table 3-6.
Table 3-3. ADSP-21060/061/062 and ADSP-21160 Boot Mode Pins
Pin Type Description
EBOOT I EPROM boot. When EBOOT is high, the processor boot-loads from an 8-bit
EPROM through the processor’s external port. When EBOOT is low, the
LBOOT and BMS pins determine the booting mode.
LBOOT I Link port boot. When LBOOT is high and EBOOT is low, the processor boots
from another SHARC through the link port. When LBOOT is low and EBOOT
is low, the processor boots from a host processor through the processor’s
external port.
BMS I/O/T 1
Boot memory select. When boot-loading from an EPROM (EBOOT=1 and
LBOOT=0), this pin is an output and serves as the chip select for the EPROM.
In a multiprocessor system, BMS is output by the bus master. When
host-booting or link-booting (EBOOT=0), BMS is an input and must be high.
1 Three-statable in EPROM boot mode (when BMS is an output).
Table 3-4. ADSP-21060/061/062 and ADSP-21160 Boot Modes
EBOOT LBOOT BMS Boot Mode
0 0 0 (Input) No-boot (processor executes from external memory)
0 0 1 (Input) Host processor
0 1 0 (Input) Reserved
0 1 1 (Input) Link port
1 0 Output EPROM (BMS is chip select)
1 1 x (Input) Reserved
VisualDSP++ 4.5 Loader and Utilities Manual 3-5