characterization, modeling, and design of esd protection circuits

106 Chapter 4. Simulation: Calibration and Results
effect of increasing drain current is offset by the lowering of the electric field, which is
proportional to Vds - Vgs . In the initial substrate simulations, Ib was about one order of
magnitude too high for the structures of both gate lengths, so simulations were then run
with lower values of λn until an optimal value was found. For the best-fit case, with λn set
at a little more than half its default value, the peak log(Ib ) for each Vds step is within 2% of
the measured value for the 0.5µm-gate structure and within 3% for the 3.0µm-gate
structure, and the peak in Ib always occurs at the correct value of Vgs . However, for Vgs greater than 2.5V the simulated substrate current of both structures rolls off more severely
than the measured current, indicating that either the current and electric field profiles in
the drain junction region are not correct or that the II model loses accuracy for lower
electric fields. It may be possible to correct the latter case by further altering the II
coefficients, but it is also possible that there is a limitation in the model. Despite the sharp
roll-off, the good fit in the peak Ib region was encouraging enough to allow the calibration
to proceed to the breakdown characteristic.
The breakdown of Fig. 4.40e results from avalanche multiplication of carriers caused by
reverse biasing the drain-substrate junction. Since the hole current sunk by the substrate is
equal to the electron current sourced by the drain, both types of carriers create avalanche
pairs and thus λn and λp both determine the breakdown voltage. Since λn was already
determined by the Ib-Vgs calibration, only λp was adjusted to calibrate BVDSS . This is
analogous to the gate and drain-characteristic calibrations in which the gate curves were
used to fit the E⊥ mobility coefficients and then the drain calibration was used to fit the
remaining mobility coefficients. Surprisingly, the default, bulk value of λp resulted in a
simulated BVDSS less than the measured BVDSS , meaning it had to be increased to fit the
curves (structures for both gate lengths have the same breakdown voltage because this
voltage does not depend on gate length). This suggests that λp had to be adjusted to
compensate for a λn which is too low or that a majority of the simulated II generation
occurs along the drain-substrate junction, where the mean free path is closer to its bulk
value, rather than under the gate at the surface. To calibrate the breakdown curve, λp only
had to be increased about 5% above its default value.
After calibration of the breakdown curves was completed, simulations for all characteristics
at both gate lengths were rerun with all of the calibrated coefficients in place. Not surprisingly,
adding the impact ionization model to the drain simulations did increase Ids for
large Vds in the 0.5µm structure, but it had no effect on the extracted saturation current,