characterization, modeling, and design of esd protection circuits

144 Chapter 5. Design and Optimization of ESD Protection Transistor Layout
certain charging voltage, VHBM , the 1500Ω series resistor of the circuit is usually much
larger than the impedance of the device under test, so we can think of both TLP and HBM
testers as current sources, with the peak HBM current equal to VHBM /1500Ω. For the
Advanced Micro Devices (AMD) 0.35µm technology studied in this chapter, we know
from failure analysis that HBM and TLP failures are thermal rather than dielectric in
nature. An identical failure mechanism leads us to believe that there may be some TLP
pulse width for which the withstand current, ITLP,ws , of any structure is equal to the peak
current of an HBM pulse at the withstand level of that structure. Note that from this point
on the TLP failure current, It2 or Ifail , is assumed to be only infinitesimally larger than the
withstand current (the maximum TLP current a structure can withstand without incurring
damage), so all terms are used interchangeably.
HBM and TLP current waveforms and the equivalent circuits used to generate them were
presented in Chapter 2. As one extreme for comparing the HBM withstand voltage,
VHBM,ws , to ITLP,ws , we assume that some total energy is required to create device failure,
independent of waveform. This assumes adiabatic thermal boundary conditions, i.e., a hot
spot leading to second breakdown which occurs in the device before any generated heat
diffuses from the region of heating. In this case, the energy required for failure is
(5.42)
where I(t) is the stress current and RDUT is the resistance of the device under test. For a
TLP stress, the current is constant for the duration of the pulse, so
where t TLP is the width of the pulse.
∞
∫
Efail I 2 = ()R t DUTdt TLP
Efail 0
2
= ITLPRDUTtTLP In the case of the ideal HBM pulse, if we assume that R DUT