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characterization, modeling, and design of esd protection circuits

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166 Chapter 6. Conclusion<br />

6.1 Contributions<br />

An overview <strong>of</strong> electrostatic discharge issues in the integrated-circuit industry was<br />

constructed to elicit appreciation <strong>of</strong> the importance <strong>of</strong> addressing ESD in process<br />

development <strong>and</strong> circuit <strong>design</strong>. The phenomenon <strong>of</strong> ESD was defined <strong>and</strong> its<br />

implications to ICs were reviewed. ESD failures fall into three main categories: thermal<br />

damage, dielectric damage, <strong>and</strong> latent failure. Three widely accepted methods used to<br />

characterize ESD sensitivity in ICs are the human-body model, machine model, <strong>and</strong><br />

charged-device model tests. Each <strong>of</strong> these models represents a potential real-world ESD<br />

event, but it was shown that the models <strong>of</strong>fer little insight to the functionality <strong>and</strong><br />

weaknesses <strong>of</strong> an ESD <strong>protection</strong> circuit <strong>and</strong> thus that a better <strong>characterization</strong> scheme is<br />

desirable. Examples <strong>of</strong> common ESD <strong>protection</strong> <strong>circuits</strong> <strong>and</strong> the theory behind their<br />

<strong>design</strong> was presented. A review <strong>of</strong> previous applications <strong>of</strong> numerical device simulation to<br />

the study <strong>of</strong> ESD illustrated how simulation can be used to <strong>design</strong> <strong>and</strong> analyze <strong>protection</strong><br />

<strong>circuits</strong> <strong>and</strong> highlighted previously untried simulation methods. A basic <strong>protection</strong>-circuit<br />

<strong>design</strong> methodology was outlined <strong>and</strong> exemplified using results from the transmission-line<br />

pulsing <strong>characterization</strong> method <strong>and</strong> two-dimensional simulations. This was followed by<br />

the description <strong>of</strong> a more complete <strong>design</strong> methodology based on empirical models<br />

extracted from a fully characterized test-structure <strong>design</strong> space.<br />

6.1.1 Transmission Line Pulsing<br />

The transmission-line pulsing test method, a relatively new ESD-circuit <strong>characterization</strong><br />

scheme, was presented. This test method is superior to the classic <strong>characterization</strong> models<br />

because it reveals how a <strong>protection</strong> circuit functions during an ESD stress <strong>and</strong> quantifies<br />

the failure threshold <strong>of</strong> a circuit over a wide range <strong>of</strong> stress times. TLP captures the<br />

transient I-V curve <strong>of</strong> a stressed device by sampling each current level so briefly that<br />

damage is not incurred. Using TLP, the evolution <strong>of</strong> leakage current, which is a measure<br />

<strong>of</strong> the degree <strong>of</strong> damage, is monitored by measuring the device leakage after each pulse.<br />

This feature aids the determination <strong>of</strong> critical points at which various types <strong>of</strong> damage are<br />

created <strong>and</strong> is especially important in capturing low-level (sub-microamp) leakage which<br />

is a signature <strong>of</strong> latent failure. The basic setup <strong>of</strong> a TLP <strong>characterization</strong> system was<br />

detailed along with an overview <strong>of</strong> some advanced setup techniques.

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