characterization, modeling, and design of esd protection circuits

2.5. Design Methodology 53
enter second breakdown and incur thermal damage. By designing Vt2 to be larger than Vt1 ,
turn-on of all fingers can be ensured, thus maximizing the thermal-failure threshold.
It is now apparent that optimization of a multifinger MOSFET protection circuit requires
more than just optimizing the robustness of the individual devices. The parameters Vt1 ,
Vsb , Rsb , and Vt2 of the single device must be manipulated so that Vt2 is greater than Vt1 .
In such multifinger circuits Rsb is also called the ballast resistance because it is meant to
stabilize the circuit by providing the necessary voltage to turn on all fingers. Adding a
poly or diffused resistor between each drain and the common input or increasing the drain
contact-to-gate spacing will increase the ballast resistance, but care must be taken not to
push Vt2 beyond the dielectric threshold level. Another way to increase the ballast
resistance is to decrease the number or reduce the size of active-metal and interlayer
metal-metal contacts, but this technique is dangerous because it increases the current
density per contact and thus thermal failure may occur at the contacts. As an alternative to
adjusting Rsb , Vt1 can be reduced through gate bounce or, if possible, by floating the
substrate. If Vt1 is reduced to the point where it is less than Vsb , i.e., the BVceo of the
parasitic bipolar transistor, then turn-on of all fingers is assured. Again, it is important that
Vt1 not be reduced within the operating level of the IC.
The analysis of one-dimensional layout variations of single-finger structures should
suggest which approaches are best for device optimization. Failure analysis, including
TLP leakage measurements as well as SEM (scanning electron microscopy) and EMMI
(emission microscope for multilayer inspection), should be incorporated in the design
process to ascertain where device failures are occurring. As described in the next chapter,
numerical device simulations can also be instrumental in designing devices and
determining where and how devices will fail. Once the potential single-finger structures
have been narrowed down to a few designs, complete multifinger ESD circuits should be
laid out and fabricated for testing. The structures should be connected to simple functional
circuits which are representative of the actual circuitry being protected in the final IC
design to verify that not only is the protection circuit surviving an ESD stress but also is
truly protecting the internal circuit from ESD.