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characterization, modeling, and design of esd protection circuits

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2.2. Transmission Line Pulsing 33<br />

above a predefined level. Reasonable time-to-failure measurements can be made down to<br />

about 50ns. For times <strong>of</strong> 1µs <strong>and</strong> greater, a pulse generator can be used in place <strong>of</strong> the<br />

charged transmission line. After a curve is experimentally determined, the dimensions <strong>of</strong><br />

the theoretical box can be extracted by fitting the model to the experimental curve.<br />

Since a Pf vs. tf curve reveals circuit failure thresholds over a wide spectrum <strong>of</strong> stress<br />

times, it suggests how robust a device is throughout the ESD <strong>and</strong> EOS regimes. It has been<br />

suggested that Pf vs. tf <strong>and</strong> If (failure current, or It2 ) vs. tf curves be used to qualify EOS/<br />

ESD reliability in addition to or in place <strong>of</strong> st<strong>and</strong>ard tests such as the HBM because<br />

reliability is then defined over a large range <strong>of</strong> stress events [24]. This attribute is<br />

attractive because it may show that a <strong>protection</strong>-circuit <strong>design</strong> performs relatively well in<br />

one domain <strong>of</strong> the EOS spectrum but performs poorly in another. Retesting after <strong>design</strong><br />

modification would reveal what portions <strong>of</strong> the spectrum are affected by a certain device<br />

parameter. Some correlation has been drawn between TLP failure levels <strong>and</strong> HBM<br />

robustness [23], but further qualification must be done before IC manufacturers accept the<br />

Pf vs. tf method as a valid reliability measure. The value <strong>of</strong> the method ultimately depends<br />

on how well the accepted classical models are represented by the constant-current stresses<br />

<strong>of</strong> TLP.<br />

2.2.3 Leakage Current Evolution<br />

The previous section mentioned the measuring <strong>of</strong> device leakage current after a TLP stress<br />

to verify that second breakdown has taken place. If a device exhibited a second snapback,<br />

it would probably not create a large increase in leakage <strong>and</strong> thus could be distinguished<br />

from the thermal second breakdown. It is in fact very useful to monitor the leakage<br />

evolution after each stress step <strong>of</strong> a TLP experiment. This can be done by removing the<br />

transmission-line connection from the input <strong>of</strong> the device under test, applying a voltage to<br />

the input (typically the supply voltage, VCC ), measuring the current with a multimeter in<br />

series with the VCC supply, then reconnecting the transmission line. The voltage should be<br />

applied as briefly as possible to avoid corrupting the TLP experiment by further stressing<br />

the device. In contrast to the single leakage measurement made after a HBM stress, this<br />

technique reveals how the increased leakage evolves as a device is stressed through the<br />

various levels <strong>of</strong> the snapback curve. Before snapback, the leakage current is typically in<br />

the pA range. A jump in leakage above the 1µA level is usually observed after second<br />

breakdown due to diffusion <strong>of</strong> dopants from source to drain, filament formation across the

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