characterization, modeling, and design of esd protection circuits

4.3. Device Failure Results 129
actually agrees quite well with experiment, in contrast to the standard structure used for
calibration, which has a CGS of 4.5µm. This good agreement suggests that structures with
lower contact-to-gate spacing may be better suited for use in calibration of the thermal
boundary conditions.
While the power to failure appears to continually increase with CGS, Fig. 4.51 shows that
the current to failure tends to level off for contact-to-gate spacings greater than about
6µm. This indicates that the added power in structures with larger CGS is being dissipated
in the increased active regions of the device (the regions between the gate and the source/
drain contacts). Since the increase in voltage to failure at higher CGS is dropped across
the active regions, the results also suggest that the failure point is always in the intrinsic
region of the device because the voltage across the drain junction and the current density
in the junction--and therefore the power generation in the junction--at the time of failure
I f / Amps
1.0
0.8
0.6
0.4
0.2
0.0
0 2 4 6 8 10
Source and Drain Contact-to-Gate Spacing / µm
Fig. 4.51 Experimental current-to-failure, If , vs. contact-to-gate spacing for
50 ⁄ 0.75µm test structures subjected to 200ns TLP pulses.