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characterization, modeling, and design of esd protection circuits

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2.2. Transmission Line Pulsing 31<br />

where P is the input power. By noting that<br />

erf ( c ⁄ 4 Dt)<br />

≈ tc ⁄ t if t≥tc (2.4)<br />

<strong>and</strong> erf ( c ⁄ 4 Dt)<br />

≈ 1 if t ≤ tc (2.5)<br />

<strong>and</strong> setting P = Pffor T = Tc, the failure power can be calculated for each <strong>of</strong> the time<br />

ranges described above:<br />

Pf = ρabcCp ( Tc – T0) ⁄ t for 0 ≤tf≤ tc , (2.6)<br />

P f<br />

P f<br />

ab πκρCp ( Tc – T0) = ---------------------------------------------------- for tc ≤tf≤ tb , (2.7)<br />

tf – tc ⁄ 2<br />

4πκa( Tc– T0) = ------------------------------------------------ for t , (2.8)<br />

ln ( tf ⁄ tb) + 2 – c⁄ b b ≤ tf ≤ta<br />

2πκa( Tc– T0) <strong>and</strong> Pf = ----------------------------------------------------------------------- for tf ≥ ta . (2.9)<br />

ln ( a ⁄ b)<br />

+ 2– c ⁄ 2b–<br />

ta ⁄ tf The Pf vs. tf curve is shown graphically in Fig. 2.12. For times less than tc , no heat is lost<br />

from the box, <strong>and</strong> a constant energy ( Pf ⋅ tf ) is needed to destroy the device. In the region<br />

tc ≤ t≤ tb, failure power is proportional to 1 ⁄ t,<br />

then becomes proportional to 1⁄ ln() t<br />

in the region tb ≤ t≤ ta. For times greater than ta , the failure power approaches a constant<br />

value, which means power dissipation is equal to power generation. Using values <strong>of</strong><br />

100µm, 1µm, <strong>and</strong> 0.1µm for a, b, <strong>and</strong> c, respectively, the values <strong>of</strong> ta , tb , <strong>and</strong> tc are approximately<br />

10µs, 1ns, <strong>and</strong> 10ps, respectively. Thus in the ESD regime we expect to see a<br />

1⁄ ln() t dependence <strong>of</strong> Pf . As noted in [23], limitations which affect the accuracy <strong>of</strong> the<br />

model are assumptions that failure follows instantaneously when the temperature reaches<br />

Tc <strong>and</strong> that there is an infinite heat sink outside the rectangular box. If there is little resistance<br />

between the depletion region <strong>and</strong> device contacts, such as in silicided processes,<br />

failure should follow quickly after Tc is reached. The main problem with the heat sink<br />

assumption is that the SiO2 layer above the silicon is a thermal insulator <strong>and</strong> seriously<br />

degrades heat dissipation in the vertical direction. This means that the power needed to<br />

cause failure is actually lower (by less than a factor <strong>of</strong> two) than that calculated by the<br />

model. Layout parameters which also affect the dissipation <strong>of</strong> heat are the closeness <strong>of</strong> the<br />

f

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