Manual - 8500A Series Peak Power Meter - Giga-tronics

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Theory of Operation Backup Battery Circuit The CPU board is supplied with backup power from the on-board battery, BT1, whenever the line voltage is off or too low to supply the instrument with the required input voltage. Transistor Q1 is turned on by the +15 V supply to supply +5 V to the circuits connected to the battery with a minimum drop in voltage. While the instrument is turned on, CR2 keeps the battery from being back charged. A4 Test Points The test points in Table 4-3 can be checked for the correct signals on the A4 CPU board: Table 4-3. A4 Test Points Test Point TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9 TP10 Description System Clock. 12MHz Read/Write signal from U13 5 V Common +5 V Reset Signal from U17 Real Time Clock (U1) Output. Used for Calibration Interrupt Request Signal from U1 Battery Voltage 15 V Common +15 V Manual No. 20790, Rev C, November 1998 4-11 Superceded by Revision D, March 2009
Series 8500A Peak Power Meters 4.2.4 Digital Delay PC Assembly (A5) See Figure 4-5, Figure 4-6, and schematic diagram #16686 in Chapter 8. The Digital Delay PC board circuitry establishes time delays that may be desired when examining sample pulses. Delays can be set in increments of 0.1 ns up to about 430 ms. As can be seen in Figure 4-5, there is a complex interaction between each of the sub-functions of the delay board circuitry. This section describes the sequence of events that occur in the delay board starting with the reset of the circuits, and continuing through the generating of the pulse sample outputs. A detailed description of individual circuitry blocks on the Digital Delay PC board follows the sequence of events. Figure 4-5. Digital Delay (A5) Block Diagram 4-12 Manual No. 20790, Rev C, November 1998 Superceded by Revision D, March 2009
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Manual Part Number: 20790 Revision
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Errata Sheet for Series 8500A Peak
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Manual - 8500A Series Peak Power Meter - Giga-tronics

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