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Manual - 8500A Series Peak Power Meter - Giga-tronics

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<strong>Series</strong> <strong>8500A</strong> <strong>Peak</strong> <strong>Power</strong> <strong>Meter</strong>s<br />

4.2.4 Digital Delay PC Assembly (A5)<br />

See Figure 4-5, Figure 4-6, and schematic diagram #16686 in Chapter 8.<br />

The Digital Delay PC board circuitry establishes time delays that may be desired when examining sample<br />

pulses. Delays can be set in increments of 0.1 ns up to about 430 ms.<br />

As can be seen in Figure 4-5, there is a complex interaction between each of the sub-functions of the<br />

delay board circuitry. This section describes the sequence of events that occur in the delay board starting<br />

with the reset of the circuits, and continuing through the generating of the pulse sample outputs. A<br />

detailed description of individual circuitry blocks on the Digital Delay PC board follows the sequence of<br />

events.<br />

Figure 4-5. Digital Delay (A5) Block Diagram<br />

4-12 <strong>Manual</strong> No. 20790, Rev C, November 1998<br />

Superceded by Revision D, March 2009

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