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Xilinx Constraints Guide

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IN_TERM (In Term)<br />

Architecture Support<br />

Applicable Elements<br />

The IN_TERM (In Term) constraint:<br />

• Is a basic mapping constraint.<br />

• Sets a configuration of input termination resistors .<br />

Chapter 4: <strong>Xilinx</strong> <strong>Constraints</strong><br />

In Term is valid on an input pad NET, input pad INST, or for the entire design.<br />

Applies to FPGA devices. Does not apply to CPLD devices.<br />

This constraint may be used with an FPGA device in one or more of the following design<br />

elements, or categories of design elements:<br />

• IOB input components (such as IBUF)<br />

• Input Pad Net<br />

Propagation Rules<br />

Not all devices support all elements. To see which design elements can be used with<br />

which devices, see the Libraries <strong>Guide</strong>s. For more information, see the device data sheet.<br />

IN_TERM is illegal when attached to a net or signal, except when the net or signal is<br />

connected to a pad. In this case, IN_TERM is treated as attached to the pad instance.<br />

Syntax Examples<br />

The following examples show how to use this constraint with particular tools or<br />

methods. If a tool or method is not listed, you cannot use this constraint with it.<br />

Values<br />

• NONE<br />

• TUNED_SPLIT<br />

• UNTUNED_SPLIT_25<br />

• UNTUNED_SPLIT_50<br />

• UNTUNED_SPLIT_75<br />

Schematic Syntax<br />

• Attach to a pad net<br />

• Attribute Name<br />

IN_TERM<br />

• Attribute Values<br />

See Values section above.<br />

<strong>Constraints</strong> <strong>Guide</strong><br />

UG625 (v. 13.2) July 6, 2011 www.xilinx.com 137

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