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Xilinx Constraints Guide

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XBLKNM (XBLKNM)<br />

Architecture Support<br />

Applicable Elements<br />

Propagation Rules<br />

The XBLKNM (XBLKNM) constraint:<br />

• Is an advanced mapping constraint.<br />

• Assigns block names to qualifying primitives and logic elements.<br />

Chapter 4: <strong>Xilinx</strong> <strong>Constraints</strong><br />

If the same XBLKNM attribute is assigned to more than one instance, the software<br />

attempts to pack logic with the same block name into one or more slices. Conversely, two<br />

symbols with different XBLKNM names are not mapped into the same block. Placing the<br />

same XBLKNM constraints on instances that do not fit within one block creates an error.<br />

Specifying identical XBLKNM attributes on FMAP symbols tells the software to group<br />

the associated function generators into a single slice. Using XBLKNM, you can partition<br />

a complete slice without constraining the slice to a physical location on the device.<br />

Hierarchical paths are not prefixed to XBLKNM attributes, so XBLKNM attributes for<br />

different slices must be unique throughout the entire design.<br />

The BLKNM attribute allows any elements except those with a different BLKNM to be<br />

mapped into the same physical component. XBLKNM, however, allows only elements<br />

with the same XBLKNM to be mapped into the same physical component. Elements<br />

without an XBLKNM cannot be not mapped into the same physical component as those<br />

with an XBLKNM.<br />

XBLKNM can also be used with block RAMs.<br />

Applies to FPGA devices. Does not apply to CPLD devices.<br />

For information about which design elements can be used with which device families,<br />

see the Libraries <strong>Guide</strong>s. For more information, see the device data sheet.<br />

Applies to the design element to which it is attached.<br />

Syntax Examples<br />

The following examples show how to use this constraint with particular tools or<br />

methods. If a tool or method is not listed, you cannot use this constraint with it.<br />

Values<br />

block_name is a valid block name for that type of symbol<br />

Schematic Syntax<br />

• Attach to a valid instance<br />

• Attribute Name<br />

XBLKNM<br />

• Attribute Values<br />

See Values section above.<br />

VHDL Syntax<br />

Declare the VHDL constraint as follows:<br />

<strong>Constraints</strong> <strong>Guide</strong><br />

UG625 (v. 13.2) July 6, 2011 www.xilinx.com 323

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