Xilinx Constraints Guide

Chapter 4: Xilinx Constraints
The following rules apply to TNM.
• TNM applied to pad nets does not propagate forward through IBUFs. The TNM is
applied to the external pad. This case includes the net attached to the D input of
an IFD. See Timing Name Net (TNM_NET) if you want the TNM to trace forward
from an input pad net.
• TNM applied to an IBUF instance is illegal.
• TNM applied to the output pin of an IBUF propagates the TNM to the next
appropriate element.
• TNM applied to an IBUF element stays attached to that element.
• TNM applied to a clock-pad-net does not propagate forward through the clock
buffer.
• When TNM is applied to a macro, all the elements in the macro have that timing
name.
Placing TNM on Nets
You can place TNM on any net in the design. The constraint indicates that the TNM
value should be attached to all valid elements fed by all paths that fan forward from the
tagged net. Forward tracing stops at FFS, RAMS, LATCHES, PADS, CPUS, HSIOS, and
MULTS. TNM does not propagate across IBUFs if they are attached to the input pad net.
Placing TNM on Macro or Primitive Pins
You can place TNM on any component pin in the design if the design entry package
allows placement of constraints on primitive pins. The constraint indicates that the
TNM value should be attached to all valid elements fed by all paths that fan forward
from the tagged pin. Forward tracing stops at FFS, RAMS, LATCHES, PADS, CPUS,
HSIOS, and MULTS.
The syntax for the UCF file is:
PIN “pin_name” TNM=”FLOPS”;
Placing TNM on Primitive Symbols
You can group individual logic primitives explicitly by placing a constraint on each
instance.
The flip-flops tagged with TNM form a group called FLOPS. The untagged flip-flops
are not part of the group. See the UCF syntax example.
Place only one TNM on each symbol, driver pin, or macro driver pin.
UCF Syntax
INST “instance_name” TNM=FLOPS;
Placing TNM on Nets or Pins to Group Flip-Flops and Latches
You can easily group flip-flops, latches, or both by flagging a common input net,
typically either a clock net or an enable net. If you attach a TNM to a net or driver pin,
that TNM applies to all flip-flops and input latches that are reached through the net or
pin. That is, that path is traced forward, through any number of gates or buffers, until it
reaches a flip-flop or input latch. That element is added to the specified TNM group.
The TNM parameter on nets or pins is allowed to have a qualifier. For example, in
UCF files:
{NET|PIN} "net_or_pin_name" TNM=FFS data;
{NET|PIN} "net_or_pin_name" TNM=RAMS fifo;
{NET|PIN} "net_or_pin_name" TNM=RAMS capture;
Constraints Guide
290 www.xilinx.com UG625 (v. 13.2) July 6, 2011