Xilinx Constraints Guide

Chapter 1: Constraint Types
TNM Net
Timing Name Net (TNM_NET) is essentially equivalent to TNM on a net except for
input pad nets. Special rules apply when using TNM_NET with the Period (PERIOD)
constraint for DLL/DCM/PLL/MMCMs in all FPGA devices
For more information, see PERIOD Specifications on CLKDLLs, DCMs, PLLs, and
MMCMs.
A TNM_NET is a property that you normally use in conjunction with an HDL design
to tag a specific net. All downstream synchronous elements and pads tagged with the
TNM_NET identifier are considered a group. For more information, see the Timing
Name (TNM) constraint.
The XCF syntax is:
NET "netname" TNM_NET=[predefined_group ] identifier;
Constraints Guide
22 www.xilinx.com UG625 (v. 13.2) July 6, 2011