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Xilinx Constraints Guide

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Syntax<br />

Chapter 2: Entry Strategies for <strong>Xilinx</strong> <strong>Constraints</strong><br />

The UCF file supports a basic syntax that can be expressed as:<br />

{NET|INST|PIN} "full_name" constraint;<br />

• full_name is a full hierarchically qualified name of the object being referred to. When<br />

the name refers to a pin, the instance name of the element is also required.<br />

• constraint is a constraint in the same form as it would be used if it were attached as<br />

an attribute on a schematic object. For example, LOC=P38 and FAST.<br />

Specifying Attributes for TIMEGRP and TIMESPEC<br />

To specify attributes for TIMEGRP, the keyword TIMEGRP precedes the attribute<br />

definitions in the constraints files.<br />

TIMEGRP "input_pads"=PADS EXCEPT output_pads;<br />

Using Reserved Words<br />

Wildcards<br />

In all of the constraints files (NCF, UCF, and PCF), instance or variable names that match<br />

internal reserved words may be rejected unless the names are enclosed in double quotes.<br />

It is good practice to enclose all names in double quotes.<br />

For example, the following entry is not accepted because the word net is a reserved word.<br />

NET net OFFSET=IN 20 BEFORE CLOCK;<br />

Following is the recommended way to enter the constraint.<br />

NET "net" OFFSET=IN 20 BEFORE CLOCK;<br />

or<br />

NET "$SIG_0" OFFSET=IN 20 BEFORE CLOCK;<br />

Enclose inverted signal names that contain a tilde (for example, ~OUTSIG1) in double<br />

quotes (mandatory) as follows:<br />

NET "~OUTSIG1" OFFSET=IN 20 BEFORE CLOCK;<br />

You can use the wildcard characters, asterisk (*) and question mark (?) in constraint<br />

statements as follows:<br />

• The asterisk (*) represents any string of zero or more characters.<br />

• The question mark (?) indicates a single character.<br />

In net names, the wildcard characters enable you to select a group of symbols whose<br />

output net names match a specific string or pattern. For example, the constraint shown<br />

below increases the output speed of pads to which nets are connected with names that<br />

meet the following patterns:<br />

• They begin with any series of characters (represented by an asterisk [*]).<br />

• The initial characters are followed by "AT."<br />

• The net names end with one single character (represented by a question mark [?].<br />

NET "*AT?" FAST;<br />

In an instance name, a wildcard character by itself represents every symbol of the<br />

appropriate type. For example, the following constraint initializes an entire set of ROMs<br />

to a particular hexadecimal value, 5555.<br />

INST "$1I3*/ROM2" INIT=5555;<br />

<strong>Constraints</strong> <strong>Guide</strong><br />

UG625 (v. 13.2) July 6, 2011 www.xilinx.com 33

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