Xilinx Constraints Guide

Chapter 2: Entry Strategies for Xilinx Constraints
A net is displayed as locked in the FPGA Editor if the Lock Net [ net_name] constraint
is enabled in the PCF file. You can use the Net Properties property sheet to remove
the lock constraint.
When a component is locked, one of the following constraints is set in the PCF file.
lock comp [comp_name]
locate comp [comp_name]
lock macro [macro_name]
lock placement
If a component is locked, you cannot unplace it, but you can unroute it. To unplace
the component, you must first unlock it.
Interaction Between Constraints
Schematic constraints are placed at the beginning of the PCF file by MAP. The start of
this section is indicated with SCHEMATIC START. The end of this section is indicated
with SCHEMATIC END. Because of a last-read order, all constraints that you enter in
this file should come after SCHEMATIC END.
You are not prohibited from entering a user constraint before the schematic constraints
section, but if you do, a conflicting constraint in the schematic-based section may
override your entry.
Every time a design is remapped, the schematic section of the PCF file is overwritten
by the mapper. The user constraints section is left intact, but certain constraints may
be invalid because of the new mapping.
Constraints Guide
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