Xilinx Constraints Guide

Chapter 4: Xilinx Constraints
SLEW (Slew)
The SLEW (Slew) constraint:
• Defines the slew rate (rate of transition) behavior of each individual output to the
device.
• May be placed on any output or bi-directional port to specify the port slew rate to be:
– SLOW (default)
– FAST
Architecture Support
Applicable Elements
Propagation Rules
– QUIETIO (Spartan®-3A devices)
Use the slowest SLEW attribute available to the device while still allowing applicable
I/O timing to be met in order to minimize any possible signal integrity issues.
Applies to all FPGA devices and all CPLD devices.
Output primitives, output pads, bidirectional pads.
You can also attach SLEW to the net connected to the pad component in a User
Constraints File (UCF). NGCBuild transfers SLEW from the net to the pad instance in
the NGD file so that it can be processed by the mapper. Use the following syntax:
NET “net_name” slew={FAST|SLOW};
SLEW should only be placed on a top-level output or bi-directional port.
Syntax
The following examples show how to use this constraint with particular tools or
methods. If a tool or method is not listed, you cannot use this constraint with it.
Values
• FAST
• SLOW
• QUIETIO
Spartan-3A devices only
Schematic Syntax
Specify a new attribute to an output port, or bi-directional port:
• Attribute Name
SLEW
• Attribute Values
See Values section above.
Constraints Guide
264 www.xilinx.com UG625 (v. 13.2) July 6, 2011