Xilinx Constraints Guide

PlanAhead Syntax
Chapter 4: Xilinx Constraints
For more information about using the PlanAhead software to create constraints, see
Floorplanning the Design in the PlanAhead User Guide (UG632). See PlanAhead in this
Guide for information about:
• Defining placement constraints
• Assigning placement constraints
• Defining I/O pin configurations
• Floorplanning and placement constraints
PACE Syntax
PACE is mainly used to assign location constraints to IOs. It can also be used to assign
certain IO properties such as IO Standards. You can access PACE from the Processes
window in the Project Navigator.
For more information, see the PACE help, especially the topics within Editing Pins
and Areas in the Procedures section. PACE is supported for CPLD devices only. It is
not supported for FPGA devices.
Digital Clock Manager (DCM) Constraint Examples
This section applies to all FPGA devices.
You can lock the DCM in the UCF file. The syntax is as follows:
INST “instance_name" LOC = DCM_XYB; (for all Spartan devices)
INST “instance_name" LOC = DCM_ADV_XYB; (for Virtex-4 and Virtex-5 devices)
A is the X coordinate, starting with 0 at the left-hand bottom corner. A increases in value
as you move across the device to the right.
B is the Y coordinate, starting with 0 at the left-hand bottom corner. B increases in
value as you move up the device.
Example
INST “myinstance” LOC = DCM_X0Y0;
Flip-Flop Constraint Examples
Flip-flop constraints can be assigned from the schematic or through the UCF file.
From the schematic, attach LOC constraints to the target flip-flop. The constraints are
then passed into the EDIF netlist and are read by PAR after the design is mapped.
The following examples show how the LOC constraint is applied to a schematic and to
a UCF (User Constraints File). The instance names of two flip-flops, /top-12/fdrd and
/top-54/fdsd, are used to show how you would enter the constraints in the UCF.
Slice-Based XY Grid Designations
Spartan-3 devices and higher and Virtex-4 devices and higher are the only architectures
that use slice-based XY grid designations.
Flip-flops can be constrained to a specific slice, a range of slices, a row or column of slices.
Example One
Place the flip-flop in SLICE_X1Y5. SLICE_X0Y0 is in the lower left corner of the device.
Constraints Guide
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