Xilinx Constraints Guide

The global OFFSET IN constraint for the DDR case is defined as:
OFFSET = IN value VALID value BEFORE clock RISING;
OFFSET = IN value VALID value BEFORE clock FALLING;
Chapter 3: Timing Constraint Strategies
For OFFSET IN, value determines the time from the capturing clock edge in which data
first becomes valid. In this source synchronous example, the rising data becomes valid
1.25 ns before the capturing rising clock edge and the falling data also becomes valid 1.25
ns before the capturing falling clock edge. For OFFSET IN, the VALID value determines
the duration in which data remains valid. In this example, both the rising and falling
data remains valid for 2.5 ns. For this example, the complete OFFSET IN specification
with an associated PERIOD is:
NET “SysCLk” TNM_NET = “SysClk”;
TIMESPEC “TS_SysClk” = PERIOD “SysClk” 5 ns HIGH 50%;
OFFSET = IN 1.25 ns VALID 2.5 ns BEFORE “SysClk” RISING;
OFFSET = IN 1.25 ns VALID 2.5 ns BEFORE “SysClk” FALLING;
These global constraints cover both data bits of the bus (data1, data2).
Constraints Guide
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