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Xilinx Constraints Guide

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Chapter 3: Timing Constraint Strategies<br />

In the related PERIOD definition, the PERIOD value is defined as a time unit (period)<br />

relationship to the primary clock. The relationship is expressed in terms of the primary<br />

clock TIMESPEC. In this example CLK2X180 operates at twice the frequency of CLK1X<br />

which results in a PERIOD relationship of ½. In the related PERIOD definition, the<br />

PHASE value defines the difference in time between the rising clock edge of the source<br />

clock and the related clock. In this example, the CLK2X180 clock is 180 degrees shifted,<br />

so the rising edge begins 1.25 ns after the rising edge of the primary clock. The syntax<br />

for this example is:<br />

NET “Clk1X" TNM_NET = “Clk1X";<br />

NET “Clk2X180" TNM_NET = “Clk2X180";<br />

TIMESPEC "TS_Clk1X" = PERIOD "Clk1X" 5 ns;<br />

TIMESPEC "TS_Clk2X180" = PERIOD "Clk2X180“ TS_Clk1X/2 PHASE +<br />

1.25 ns ;<br />

Asynchronous Clock Domains<br />

Asynchronous clock domains are defined as those in which the transmit and capture<br />

clocks bear no frequency or phase relationship. Because the clocks are not related, it is<br />

not possible to determine the final relationship for setup and hold time analysis. For this<br />

reason, it is recommended that proper asynchronous design techniques be employed<br />

to ensure the successful capture of data. However, while not required, in some cases<br />

designers wish to constrain the maximum data path delay in isolation without regard to<br />

clock path frequency or phase relationship.<br />

The <strong>Xilinx</strong> constraints system allows for the constraining of the maximum data path<br />

delay without regard to source and destination clock frequency and phase relationship.<br />

This requirement is specified using FROM-TO with the DATAPATHONLY keyword.<br />

The methodology for this process is:<br />

1. Define a time group for the source registers<br />

2. Define a time group for the destination registers<br />

3. Define the maximum delay of the net using FROM-TO between the two time groups<br />

with DATAPATHONLY keyword.<br />

For more information on using FROM-TO with the DATAPATHONLY keyword, see<br />

FROM-TO.<br />

<strong>Constraints</strong> <strong>Guide</strong><br />

58 www.xilinx.com UG625 (v. 13.2) July 6, 2011

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