01.07.2013 Views

Xilinx Constraints Guide

Xilinx Constraints Guide

Xilinx Constraints Guide

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

Chapter 1: Constraint Types<br />

Relative Location (RLOC) <strong>Constraints</strong><br />

The RLOC constraint groups logic elements into discrete sets.<br />

• You can define the location of any element within the set relative to other elements<br />

in the set, regardless of eventual placement in the overall design.<br />

• For example, if RLOC constraints are applied to a group of eight flip-flops organized<br />

in a column, the mapper maintains the columnar order and moves the entire group<br />

of flip-flops as a single unit.<br />

• In contrast, absolute LOC constraints constrain design elements to specific locations<br />

on the FPGA die with no relation to other design elements.<br />

Placement <strong>Constraints</strong><br />

• AREA_GROUP<br />

• BEL<br />

• LOC<br />

• LOCATE<br />

• Prohibit<br />

• RLOC<br />

• RLOC_ORIGIN<br />

• RLOC_RANGE<br />

• USE_RLOC<br />

<strong>Constraints</strong> <strong>Guide</strong><br />

16 www.xilinx.com UG625 (v. 13.2) July 6, 2011

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!