Xilinx Constraints Guide

Constraint Types
Attributes and Constraints
Attributes
This chapter discusses the constraint types documented in this Guide.
Chapter 1
Some designers use the terms attribute and constraint interchangeably. Other designers
give them different meanings. In addition, certain language constructs use the terms
attribute and directive in similar, but not identical, senses. Xilinx® uses the terms attributes
and constraints as defined below.
An attribute is a property associated with a device architecture primitive component
that generally affects an instantiated component functionality or implementation.
Attributes are passed by means:
• Generic maps (VHDL)
Attributes Examples
• Defparams or inline parameter passed while instantiating the primitive component
(Verilog)
All attributes are described in the Xilinx Libraries Guides as a part of the primitive
component description.
• INIT on a LUT4 component
• CLKFX_DIVIDE on a DCM
Implementation Constraints
The Constraints Guide documents implementation constraints.
An implementation constraint is an instruction given to the FPGA implementation tools
to direct the mapping, placement, timing or other guidelines to follow while processing
an FPGA design.
Implementation constraints are generally placed in the User Constraints File (UCF).
They may also be placed in:
• The Hardware Description Language (HDL) code
• A synthesis constraints file.
Implementation Constraints Examples
• LOC (placement)
• PERIOD (timing)
Constraints Guide
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