Xilinx Constraints Guide

Chapter 4: Xilinx Constraints
Guidelines for Specifying Relative Locations
The slice-based coordinate system for assigning elements to relative location uses the
following general syntax.
RLOC=Xm Yn
where
• m and n are the relative X axis (left/right) value and the relative Y axis (up/down)
value, respectively.
• X and Y numbers can be zero or any positive or negative integer
Because the X and Y numbers in RLOC constraints define only the order and relationship
between design elements, and not their absolute die locations, their numbering can
include negative numbers. Even though you can use any integer for RLOC constraints,
Xilinx® recommends small integers for clarity and ease of use.
The absolute values of X and Y is not important in RLOC specifications, but rather their
relative values or differences. For example, if design element A has an RLOC=X3Y4
constraint and design element B has an RLOC=X6Y7 constraint, the absolute values of
X (3 and 6) are not important in themselves. However, the difference between them is
significant. In this case, 3 (6-3) specifies that the location of design element B is three
slices away from the location of design element A.
To capture this information, a normalization process is used and y coordinate-wise,
element is 3 (7-4) slices above element A. In the example just given, normalization
reduces the RLOC on design element A to X0Y0, and the RLOC on design element B
to X3Y3.
In Spartan®-3 devices and higher and Virtex®-4 devices and higher, slices are numbered
on an XY grid beginning in the lower left corner of the chip. X ascends in value
horizontally to the right. Y ascends in value vertically up. RLOC constraints follow
the Cartesian-based convention.
Constraints Guide
246 www.xilinx.com UG625 (v. 13.2) July 6, 2011