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Xilinx Constraints Guide

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PCF Syntax<br />

item MAXDELAY = maxvalue [PRIORITY integer];<br />

where<br />

• item can be:<br />

– ALLNETS<br />

– NET name<br />

– TIMEGRP name<br />

– ALLPATHS<br />

– PATH name<br />

– path specification<br />

• maxvalue can be a:<br />

– numerical time value with units of micro, ms, ps, or ns<br />

– numerical frequency value with units of GHz, MHz, or KHz<br />

– TSidentifier<br />

<strong>Constraints</strong> Editor Syntax<br />

Chapter 4: <strong>Xilinx</strong> <strong>Constraints</strong><br />

To open <strong>Constraints</strong> Editor, select ISE® Design Suite > Processes > User <strong>Constraints</strong> ><br />

Exceptions > Timing <strong>Constraints</strong> > Nets.<br />

FPGA Editor Syntax<br />

To set MAXDELAY to all paths or nets, select File > Main Properties > Global Physical<br />

<strong>Constraints</strong>.<br />

To set MAXDELAY to a selected path or net, with a routed net selected, select Edit ><br />

Properties of Selected Items > Physical <strong>Constraints</strong>.<br />

<strong>Constraints</strong> <strong>Guide</strong><br />

UG625 (v. 13.2) July 6, 2011 www.xilinx.com 183

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