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Suprem-III User´s Manual
SUPREM-III Example 1. NMOS Silicon Gate
Active device region initial processing.
File S3EX1A
Initialize silicon substrate.
Grow pad oxide, 400A.
Deposit 800A of CVD Nitride.
Grow field oxide.
layer material type thickness dx dxmin top bottom orientation
no.
(microns) (microns) node node or grain size
4 OXIDE 0.0176 0.0100 0.0010 330 332
3 NITRIDE 0.0694 0.0100 0.0010 333 347
2 OXIDE 0.0376 0.0100 0.0010 348 352
1 SILICON 1.4835 0.0050 0.0010 353 500
Integrated Dopant
layer Net Total
no. active chemical active chemical
4 0.0000e+00 0.0000e+00 0.0000e+00 0.0000e+00
3 0.0000e+00 -1.2524e+07 0.0000e+00 1.2524e+07
2 0.0000e+00 -6.8527e+09 0.0000e+00 6.8527e+09
1 -1.4225e+11 -1.4225e+11 1.4225e+11 1.4225e+11
sum -1.4225e+11 -1.4912e+11 1.4225e+11 1.4912e+11
Integrated Dopant
layer BORON
no. active chemical
4 0.0000e+00 0.0000e+00
3 0.0000e+00 1.2524e+07
2 0.0000e+00 6.8527e+09
1 1.4225e+11 1.4225e+11
sum 1.4225e+11 1.4912e+11
Junction Depths and Integrated Dopant
Concentrations for Each Diffused Region
layer region type junction depth net total
no. no. (microns) active Qd chemical Qd
4 1 n 0.0000 0.0000e+00 0.0000e+00
3 2 n 0.0000 0.0000e+00 0.0000e+00
3 1 p 0.0694 0.0000e+00 0.0000e+00
2 1 p 0.0000 0.0000e+00 6.8527e+09
1 1 p 0.0000 1.4225e+11 1.4225e+11
Etch to silicon surface.
Implant boron to shift the threshold voltage.
Grow gate oxide
Deposit polysilicon
Heavily dope the polysilicon using POCl3