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SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA<br />

Debug module 105<br />

DM.TRCTL<br />

0x100040<br />

Field Bits Size Volatile? Synopsis Type<br />

DM_TRIG_<br />

OUT_MODE<br />

[23:21] 3 — Trigger-out mode RW<br />

Operation<br />

When read<br />

When written<br />

HARD reset 0<br />

Defines the mode of operation of the trigger-out function.<br />

Section 4.1.3: Performance counters on page 243 defines the<br />

length of trigger out pin pulses.<br />

Value - Description<br />

0b000: The trigger-out function is disabled and the DM_TROUT_N<br />

pin is held high.<br />

0b001: An active-low pulse is output each time a WPC (a CPU core<br />

watchpoint) channel triggers, and the triggering channel has<br />

.ACTION_TRIG_OUT set as one of its actions.<br />

0b010: An active-low pulse is output each time a bus analyzer<br />

channel triggers, and the triggering channel has<br />

.ACTION_TRIG_OUT set as one of its actions.<br />

0b100: The trigger-out pin is connected to the output of the WPC<br />

chain-latch, WPC.CHAIN_0.<br />

0b101: The trigger-out pin (DM_TROUT_N) is connected to the<br />

output of the DM shared chain-latch, DM.CHAIN_0.<br />

0b110: The trigger-out pin is connected to the stall-acknowledge<br />

signal from the CPU core. If stall mode is selected, the<br />

DM_TROUT_N signal goes low during the time that the CPU is<br />

stalled when the capture buffer is full.<br />

0b111: Undefined<br />

Returns current value<br />

Updates current value<br />

D R A FT<br />

Table 31: DM.TRCTL definition<br />

05-SA-10003 v1.0<br />

<strong>SuperH</strong>, Inc.<br />

<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 3: Debug

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