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SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA<br />

Debug event actions 63<br />

DM.WP_PLx_ACTION<br />

where x = channel ID (relative to PL)<br />

Field Bits Size Volatile? Synopsis Type<br />

PL_MODULE [30:23] 8 — <strong>SuperH</strong>yway bus physical module<br />

number<br />

Operation<br />

When read<br />

When written<br />

HARD reset<br />

D R A FT<br />

RW<br />

This field only applies to <strong>SuperH</strong>yway bus analyzer<br />

watchpoints. Defines the identity of a physical <strong>SuperH</strong>yway bus<br />

master module (one of 256 possible masters) associated with<br />

the DM.WP_PLX_CTRL.SRC field for the purpose of freezing the<br />

bus master when a watchpoint hit occurs. The relationship<br />

between physical module number and <strong>SuperH</strong>yway protocol<br />

source ID is specific to the chip implementation and known to<br />

the debug programmer. The implementation specific<br />

information is held in Table 91: DM.PLx_ACTION.pl_module/<br />

DM.PLX_FRZ.freeze_x/<strong>SuperH</strong>yway module mapping on<br />

page 251.<br />

Returns current value<br />

Updates value<br />

Undefined<br />

Table 20: DM.WP_PLx_ACTION register definition<br />

05-SA-10003 v1.0<br />

<strong>SuperH</strong>, Inc.<br />

<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 3: Debug

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