SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA
Watchpoint channels 37
The WP channel match sequence described in Section 1.6: WP channel matching on
page 66.
WP-channel Register name Abbreviation
IA, OA, IV,
WPC_PERF
PL, FPF
IA, OA, IV
DM, PL
IA, OA, IV,
WPC_PERF,
PL, DM
WPC.WP_NX_PRE
DM.WP_NX_PRE
DM.WP_NX_PRE
WPC.WP_NX_ACTION
DM.WP_NX_ACTION
DM.WP_NX_ACTION
WPC.WP_NX_MATCH
DM.WP_NX_MATCH
Defines a set of pre conditions to apply when
performing channel matching.
Described in Section 1.6: WP channel matching on
page 66.
Defines a set of actions to apply when the debug event
matches.
Described in Section 1.5: Debug event actions on
page 48.
Defines a set of match criteria which are specific to the
WP Channel’s type (that is, IA watchpoints contain an
address range, IV watchpoints contain an instruction
value and instruction mask).
Described in
Section 1.9: Debug protocols and interfaces on
page 118
Section : Implicit action: on page 138
Section 1.12: WP channel type OA on page 143
Section 1.13: WP channel type IV on page 152
Section 1.15: WP channel type FPF on page 163
Section 1.16: WP channel type PL on page 164
Section 1.17: WP channel type DM on page 164
Section 1.18: WP channel type WPC_PERF on
page 165
n = name of the channel (for example IA for IA channel)
x = a 4 bit value to specify the channel ID (relative to n), for example x= 2 for IA2.
D R A FT
Table 13: WP channel generic registers
Each WPC channel has two PRE registers, one which is implemented in the WPC
and the second which is implemented in the debug module.
05-SA-10003 v1.0
SuperH, Inc.
SH-5 System Architecture, Volume 3: Debug