SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA 258 Debug register address map Register name Offset References IV WPC.WP_IV0_PRE 0x400400 Table 14: WPC.WP_{IA/OA/ IV/WPC_PERF}x_PRE register definition on page 38 WPC. PERF WPC.WP_IV0_ACTION 0x400408 Table 18: WPC.WP_{IA/OA/ IV}x_ACTION register definition on page 49 WPC.WP_IV0_MATCH_VALUE 0x400410 Table 56: WPC.WP_IVx_MA TCH_VALUE register definition on page 153 WPC.WP_IV0_MATCH_MASK 0x400418 Table 57: WPC.WP_IVx_MA TCH_MASK register definition on page 153 WPC.WP_IV1_PRE 0x400440 See cross references for channel WP_IV0. WPC.WP_IV1_ACTION 0x400448 WPC.WP_IV1_MATCH_VALUE WPC.WP_IV1_MATCH_MASK 0x400450 0x400458 WPC.WP_WPC_PERF0_PRE 0x400200 Table 14: WPC.WP_{IA/OA/ IV/WPC_PERF}x_PRE register definition on page 38 WPC.WP_WPC_PERF0_MATCH_TYPE 0x400208 Table 60: WPC.WP_WPC_P ERFx_MATCH_TYPE register definition on page 166 WPC.WP_WPC_PERF1_PRE 0x400210 Table 14: WPC.WP_{IA/OA/ IV/WPC_PERF}x_PRE register definition on page 38 D R A FT WPC.WP_WPC_PERF1_MATCH_TYPE 0x400218 Table 60: WPC.WP_WPC_P ERFx_MATCH_TYPE register definition on page 166 Table 94: Register map and references SuperH, Inc. SH-5 System Architecture, Volume 3: Debug 05-SA-10003 v1.0
PRELIMINARY DATA Debug register address map 259 DM version control/error rags Register name Offset References DM chain latches DM.VCR 0x0 Section 4.1.11: DM.VCR register on page 250. DM.CHAIN_0 DM.CHAIN_TRIG_IN 0x100000 0x100008 Section 1.2.8: Chain latches on page 21 and Table 5: {WPC/ DM}_CHAIN_x definition on page 25 DM event counters DM.ECOUNT_VALUE_0 0x200000 Table 7: {WPC/ DM}.ECOUNT_VALUE_x register definition on page 27. DM performance counters DM.PCOUNT_VALUE_0 0x200008 Section 1.2.10: Performance counters on page 28. DM.PCOUNT_VALUE_1 0x200010 Table 94: Register map and references D R A FT 05-SA-10003 v1.0 SuperH, Inc. SH-5 System Architecture, Volume 3: Debug
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PRELIMINARY DATA SuperH TM (SH) 64-
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PRELIMINARY DATA Contents Preface 9
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PRELIMINARY DATA 5 1.8.11 DM.TRBUF
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PRELIMINARY DATA 7 3.2.5 Pin state
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PRELIMINARY DATA Preface This docum
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PRELIMINARY DATA Debug/trace archit
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PRELIMINARY DATA Overview of debug
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PRELIMINARY DATA Key concepts 15 Th
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PRELIMINARY DATA Key concepts 17 Ac
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PRELIMINARY DATA Key concepts 19 1.
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PRELIMINARY DATA Key concepts 21 1.
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PRELIMINARY DATA Key concepts 23 La
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PRELIMINARY DATA Key concepts 25 {W
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PRELIMINARY DATA Key concepts 27 If
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PRELIMINARY DATA Key concepts 29 Re
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PRELIMINARY DATA CPU control 31 1.3
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PRELIMINARY DATA CPU control 33 1.3
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PRELIMINARY DATA Watchpoint channel
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PRELIMINARY DATA Debug event action
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PRELIMINARY DATA WP channel matchin
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PRELIMINARY DATA Reset, panic and d
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PRELIMINARY DATA Debug module 85 DM
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PRELIMINARY DATA Debug module 87
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PRELIMINARY DATA Debug module 89 Wh
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PRELIMINARY DATA Debug module 91 St
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PRELIMINARY DATA Debug module 93 Mu
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PRELIMINARY DATA Debug module 95 1.
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PRELIMINARY DATA Debug module 97 1.
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PRELIMINARY DATA Debug module 99 DM
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PRELIMINARY DATA Debug module 101 D
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PRELIMINARY DATA Debug module 107 1
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PRELIMINARY DATA Debug module 113
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PRELIMINARY DATA Debug module 117 1
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PRELIMINARY DATA Debug protocols an
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PRELIMINARY DATA WP channel type BR
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PRELIMINARY DATA WP channel type IA
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PRELIMINARY DATA WP channel type IA
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PRELIMINARY DATA WP channel type OA
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PRELIMINARY DATA WP channel type IV
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PRELIMINARY DATA WP channel type IV
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PRELIMINARY DATA WP channel type FP
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PRELIMINARY DATA WP channel type WP
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PRELIMINARY DATA SuperHyway bus ana
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PRELIMINARY DATA SuperHyway watchpo
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PRELIMINARY DATA Address comparison
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PRELIMINARY DATA Freezing bus maste
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PRELIMINARY DATA WP channel type PL
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PRELIMINARY DATA External debug int
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PRELIMINARY DATA SHdebug link 201 3
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PRELIMINARY DATA SHdebug link 203 3
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PRELIMINARY DATA SHdebug link 205 T
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Page 213 and 214: PRELIMINARY DATA JTAG interface 213
Page 219 and 220: PRELIMINARY DATA Debug tool reset/s
Page 225 and 226: PRELIMINARY DATA Trigger functions
Page 227 and 228: PRELIMINARY DATA DBUS protocol 227
Page 241 and 242: PRELIMINARY DATA Implementation spe
Page 243 and 244: PRELIMINARY DATA Scalable parameter
Page 253 and 254: PRELIMINARY DATA Debug register add
Page 257: PRELIMINARY DATA Debug register add
Page 265 and 266: PRELIMINARY DATA Index A Actions 13
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Page 269 and 270: PRELIMINARY DATA 269 158-160, 166-1
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