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SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA<br />

46 Watchpoint channels<br />

DM.WP_FPF_PRE<br />

0x800280<br />

Field Bits Size Volatile? Synopsis Type<br />

BASIC_ENABLE 0 1 — Enable RW<br />

Operation See BASIC_ENABLE field of Table 14 on page 38.<br />

When read<br />

When written<br />

HARD reset<br />

Returns current value<br />

Updates value<br />

Undefined<br />

ASID_ENABLE 1 1 — ASID match enable RW<br />

Operation<br />

When read<br />

When written<br />

HARD reset<br />

Enables or disables the inclusion of the current ASID value in<br />

the debug event match. Irrespective of this setting, the ASID<br />

value is always included in the FPF message.<br />

Value - Description<br />

0: ASID match disabled.<br />

1: ASID match enabled. Will only trigger when the current ASID<br />

matches the ASID_VALUE field.<br />

Returns current value<br />

Updates value<br />

Undefined<br />

CHAIN_ENABLE 2 1 — Chain-latch enable RW<br />

Operation See the CHAIN_ENABLE field of Table 14 on page 38.<br />

When read<br />

When written<br />

HARD reset<br />

Returns current value<br />

Updates value<br />

D R A FT<br />

Undefined<br />

Table 17: DM.WP_FPF_PRE register definition<br />

<strong>SuperH</strong>, Inc.<br />

<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 3: Debug 05-SA-10003 v1.0

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