SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA
Debug module 87
• Write trace messages into a trace buffer in the target system’s memory.
• Set and clear any of the chain-latches in the debug module.
• Control the trigger-out signal (DM_TROUT_N).
• Route SuperHyway bus transactions to or from the tool using either the
SHdebug link or the JTAG debug interface.
1.8.1 Address spaces
The debug module is assigned 32 Mbytes of SuperHyway target address space. 16
Mbytes of this consists of DM registers, the other 16 Mbytes is mapped to the tool
via the SHdebug link/JTAG port.
1.8.2 Fast printf
Fast printf is an extremely simple and powerful technique in which the processor
emits a piece of data and the current PC value whenever a program writes to a
special CPU register. External hardware and software print this data as requested
by the programmer, usually in the “console” window of a graphical debugger
running on a tool. Support of fast printf requires enhancements to the programming
tools, as well as appropriate debugging facilities. The fast printf function allows a
programmer to embed fast printf code into programs and probe any register or
memory contents.
The fast printf function is part of the debug module logic and uses the DM.FPF
register. Whenever the DM.FPF register is written, the debug module creates a trace
message containing the program counter, ASID and the data value. This trace
message is sent directly to the tool, bypassing the DM FIFO, irrespective of how the
trace destination is configured. The FPF trace message is sent to the tool at the first
opportunity, that is, immediately following any other trace message currently being
sent.
D R A FT
Writes to the DM.FPF register are treated differently from writes to other
SuperHyway bus registers. The debug module delays the SuperHyway bus response
to such writes until the FPF trace message has been sent to the tool.
The fast printf function is available as a WP channel (see Section 1.4: Watchpoint
channels on page 35). This allows its operation to be selectively enabled and
disabled by one of the chain latches.
05-SA-10003 v1.0
SuperH, Inc.
SH-5 System Architecture, Volume 3: Debug