SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA
164 WP channel type PL
1.16 WP channel type PL
Bus analyzer watchpoints trigger whenever the bus analyzer(s) detect a matching
transaction on the internal interconnect.
These channels are defined in Chapter 2: SuperHyway bus analyzer on page 179.
1.17 WP channel type DM
Debug module watchpoints trigger whenever the DM’s FIFO is operating in “trace
hold” mode, and entries are written to the FIFO as configured by the DM.TRCTL
register (see Section 1.8.10: DM.TRCTL (trace/trigger register) on page 97).
The DM channel is unaffected by SR.WATCH.
1.17.1 Match registers
There is no associated match register.
1.17.2 Event specifics
The DM channel is not a normal WP channel - it does not use the generic
{WPC/DM}.WP_NX_PRE and {WPC/DM}.WP_NX_ACTION register formats as it only has
one precondition, and only one action. This precondition and action are implicit, so
there are no PRE or ACTION registers for the DM channel.
Source: Debug module
Reason: FIFO activity
The FF_THRESH field of DM.TRCTL (see Section 1.8.10: DM.TRCTL (trace/trigger
register) on page 97) is used to specify that the DM will raise a debug interrupt when
the FIFO has either:
• had an entry written to it,
• reached its high-water mark.
D R A FT
SuperH, Inc.
SH-5 System Architecture, Volume 3: Debug 05-SA-10003 v1.0