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SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA<br />

Key concepts 21<br />

1.2.8 Chain latches<br />

<strong>SH</strong>-5 provides a series of chain-latches. Chain-latches allow watchpoint hits, in the<br />

WPC or bus analyzers, to enable or disable any other watchpoints.<br />

Chain latches consist of an item of state, which is either set or clear. No assumptions<br />

are made about the type of sequential device which will be used in the<br />

implementation. Figure 1 shows a functional block diagram of the chain-latches.<br />

IAx<br />

Watchp<br />

oint<br />

Address<br />

comparison<br />

valid<br />

Set<br />

Clear<br />

Full hit<br />

WPC.<br />

CHAIN_x<br />

Other WP<br />

pre-conditions<br />

WPC<br />

chain-latch set/<br />

cleared by<br />

WPC<br />

watchpoint hit<br />

action<br />

&<br />

Set<br />

WPC.IA_C<br />

HAIN_x<br />

Clear<br />

Select one<br />

chain-latch<br />

&<br />

WPC<br />

watchpoint<br />

enable<br />

WP Hit<br />

Actions<br />

D R A FT<br />

Repeat for all<br />

other WPC<br />

watchpoints<br />

dm_trin_n pin<br />

+<br />

Shared<br />

chain-latch<br />

Set<br />

Clear<br />

DM.<br />

CHAN_x<br />

Shared<br />

chain-latch can<br />

be set/cleared<br />

by any<br />

watchpoint hit<br />

action<br />

OR<br />

Other WP<br />

pre-conditions<br />

Set<br />

TRIG_IN<br />

LATCH<br />

Clear<br />

Select one<br />

chain-latch<br />

&<br />

bus analyzer<br />

watchpoint enable<br />

WP Hit<br />

Actions<br />

Repeat for all other<br />

bus analyzer<br />

watchpoints<br />

Chain-latches in WPC<br />

Chain-latches in DM<br />

Figure 1: Chain-latch concept<br />

05-SA-10003 v1.0<br />

<strong>SuperH</strong>, Inc.<br />

<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 3: Debug

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