SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA
Debug tool reset/suspend behavior 223
3.4.3 CPU suspend function
The DM_ISYNC signal has two functions. Its primary function is the synchronization
pin for messages sent to SH-5 from a SHdebug link-connected tool. Its secondary
function controls CPU suspend state.
At the end of a POWERON, MANUAL or DEBUG reset function, when NOTRESET is pulled
high, the CPU can either start executing boot code or can enter a suspended state
depending on the state of the DM_ISYNC signal sampled when NOTRESET goes from
low to high. If DM_ISYNC is sampled low at the end of the reset phase, the CPU
remains suspended on the assumption that various SH-5 registers will be loaded by
a connected tool. At some later time, the tool will release the CPU from its
suspended state by writing to the WPC.CPU_CTRL_ACTION register. If DM_ISYNC is
sampled high at the end of the reset phase, the CPU starts executing boot code.
This DM_ISYNC pin has an internal pull-up resistor to ensure that when no debug tool
is connected to a debug connector, the CPU is not suspended at the end of reset.
The CPU suspend function is also available to JTAG-connected tools. The JTAG
debug header signal SUSPEND_ is an AC-decoupled version of the DM_ISYNC pin. Since
DM_ISYNC is a high-speed signal used by the SHdebug link, board-level products must
include a series resistor between SUSPEND_ pin in the JTAG header and the DM_ISYNC
pin. This resistor (of value around 1K ohm) must be located close to the DM_ISYNC pin
to minimize the effect of the extra trace length on the printed circuit board. A bypass
capacitor is also required.
D R A FT
05-SA-10003 v1.0
SuperH, Inc.
SH-5 System Architecture, Volume 3: Debug