SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA
WP channel matching 69
Potentially either clear or set a DM chain latch:
if ( (FULL_WP_HIT && EXTRA_HIT) && (!action.action_exception) ) {
maybeUpdateDMChainLatch = 1;
} else {
maybeUpdateDMChainLatch = 0;
}
if (maybeUpdateDMChainLatch && action.action_chain_alter == 0b10) {
CHAIN_LATCH[action.chain_id] = 0;
}
if (maybeUpdateDMChainLatch && action.action_chain_alter == 0b11) {
CHAIN_LATCH[action.chain_id] = 1;
}
Potentially generate trace (see Section 1.8.5: IA watchpoint trace modes on page 92
for full details):
if ((FULL_WP_HIT && EXTRA_HIT) && action.action_trace &&
!action.action_exception) {
GenerateTrace();
}
Potentially generate an interrupt:
if ((FULL_WP_HIT && EXTRA_HIT) && !action.action_exception &&
action.action_interrupt) {
GenerateInterrupt();
}
Potentially modify performance counters:
if (FULL_WP_HIT && !action.action_exception && action.action_pcount)
{
IncrementPerformanceCounter(action.pcount_id);
}
if (FULL_WP_HIT && !action.action_exception &&
action.reset_all_pcount) {
ResetAllPerformanceCounters();
}
Potentially signal the trigger out pin:
D R A FT
if ((FULL_WP_HIT && EXTRA_HIT) &&
!action.action_exception && action.action_trig_out) {
PulseTriggerOutPin();
}
05-SA-10003 v1.0
SuperH, Inc.
SH-5 System Architecture, Volume 3: Debug