25.02.2015 Views

SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

SHOW MORE
SHOW LESS

Create successful ePaper yourself

Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.

PRELIMINARY DATA<br />

126 Debug protocols and interfaces<br />

OA watchpoint trace message (7-bytes minimum, 16-bytes maximum)<br />

Field<br />

Size<br />

Header <strong>bit</strong><br />

positions<br />

Description<br />

DATA_FIELD_SIZE 3-<strong>bit</strong>s [15:13] Defines how much data was stored to memory by the<br />

triggering instruction.<br />

Value - Description<br />

0b000: The instruction which hit the watchpoint did not<br />

write to a memory location.<br />

0b001: Undefined<br />

0b010: Undefined.<br />

0b011: Undefined.<br />

0b100: 1 byte. The instruction which hit the watchpoint<br />

did a 1 byte write to a memory location.<br />

0b101: 2 byte write (as above)<br />

0b110: 4 byte write (as above)<br />

0b111: 8 byte write (as above)<br />

TIMESTAMP 0 or 1<br />

byte<br />

ASID 0 or 1<br />

byte<br />

PC 1, 2 or 4<br />

bytes<br />

N/A<br />

N/A<br />

N/A<br />

Table 42: OA watchpoint trace message<br />

D R A FT<br />

<strong>SuperH</strong>, Inc.<br />

<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 3: Debug 05-SA-10003 v1.0

Hooray! Your file is uploaded and ready to be published.

Saved successfully!

Ooh no, something went wrong!