SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA
WP channel type PL 191
DM.WP_PLx_CTRL
where x= channel id
Field Bits Size Volatile? Synopsis Type
SRC_MSK [31:24] 8 — Watchpoint source mask RW
Operation
When read
When written
HARD reset
Defines which bits in the SRC_VAL field must match for the
watchpoint to trigger.
A value of ‘1’ in a bit position causes the watchpoint comparator to
ignore the corresponding bit of the SRC_VAL field, a value of ‘0’ in a
bit position causes the watchpoint comparator include the bit in the
comparison.
Thus, a value of 0xFF causes the source field in each transaction
to be ignored and the watchpoint will match all sources.
Returns current value
Updates current value
Undefined
SRC_VAL [39:32] 8 — Watchpoint transaction source RW
Operation
When read
When written
HARD reset
Defines the identity of the transaction source.
A value of 0xFF means that the watchpoint ignores the source field
and will match the transaction generated by any source.
Returns current value
Updates current value
Undefined
— [47:40] 8 — Reserved RES
Operation
Reserved
When read Returns 0
When written
HARD reset 0
D R A FT
Ignored
Table 67: DM.WP_PLx_CTRL register definition
05-SA-10003 v1.0
SuperH, Inc.
SH-5 System Architecture, Volume 3: Debug