SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA
Overview of debug features 13
1.1.4 Watchpoint actions
Watchpoints can perform a number of actions:
• Raise a CPU debug exception (to invoke the debug exception handler).
• Capture all parameters associated with the debug event, and generate a trace
message. The trace message can optionally include timestamp information, and
can also include data values.
• Set or clear chain latches, which allow debug events to be chained together in
complex sequences.
• Decrement event counters, which allow events to be disabled until they have
occurred a specified number of times.
• Increment performance counters.
• Reset all performance counters.
• Control the state of the trigger-out pin.
1.1.5 Fast printf
A memory-mapped register is available, which when written to results in a specified
message being sent to the tool. These messages can be read by the tool and used to
implement arbitrary communication functions, such as:
• Dump of specific trace/data or timing information.
Can be used to provide minimally intrusive code instrumentation facilities.
• Virtual I/O - for target/tool communications (such as file/tty access to the tool).
These facilities are used to implement “software backplanes” (scalable host/
target debug systems).
1.1.6 Bus analyzer
D R A FT
A bus analyzer is provided on SH-5’s SuperHyway bus.
This provides SuperHyway request or SuperHyway response packet watchpoint
facilities, and can be used to generate trace information, and provide performance
information. The bus analyzer can be combined with CPU watchpoints in order to
provide sophisticated conditions for filtering debug events.
05-SA-10003 v1.0
SuperH, Inc.
SH-5 System Architecture, Volume 3: Debug