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SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA<br />

WP channel type PL 187<br />

DM.PL_FRZ<br />

0x100080<br />

Field Bits Size Volatile? Synopsis Type<br />

— [16,63] 48 — Reserved RES<br />

Operation<br />

2.8 WP channel type PL<br />

Separate sets of pre-condition, match, and action-condition registers exist for each of<br />

the <strong>SuperH</strong>yway bus analyzer watchpoints. The fields of the pre-condition registers<br />

are described in Table 16: DM.WP_PLx_PRE register definition on page 44. The<br />

fields of the action-condition registers are described in<br />

Table 20: DM.WP_PLx_ACTION register definition on page 60.<br />

Match registers<br />

Reserved<br />

When read Returns 0<br />

When written<br />

HARD reset 0<br />

Ignored<br />

Table <strong>64</strong>: DM.PL_FRZ register definition<br />

Control registers for each watchpoint channel defines the conditions which enable<br />

the watchpoint. Refer to the generic description in Section 1.6: WP channel<br />

matching on page 66.<br />

In addition to the generic pre registers, special match registers are also used. These<br />

are defined in the tables that follow. These registers must only be modified with the<br />

watchpoint channel disabled (DM.WP_PLX_PRE.BASIC_ENABLE==0). If they are<br />

modified with the channel enabled, the behavior is architecturally undefined.<br />

D R A FT<br />

05-SA-10003 v1.0<br />

<strong>SuperH</strong>, Inc.<br />

<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 3: Debug

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