SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

PRELIMINARY DATA
186 Unfreezing bus masters
As shown in Figure 7, the least-significant 16-bits of DM.PL_FRZ connect directly to
the SuperHyway arbiter and the individual signals are used by the arbiter to freeze/
unfreeze a given master.
2.7 Unfreezing bus masters
The DM.PL_FRZ register allows software to determine which bus masters are
currently frozen and to unfreeze one or more bus masters. This register contains 16
identical single bit fields which are associated with up to 16 SuperHyway bus
master modules capable of being frozen. Modules not capable of being frozen and
which do not have a corresponding FREEZE_X field include the CPU and the DM. The
identity of the SuperHyway physical module associated with each FREEZE_X field is
chip-specific (see Section 4.1.12: Bus analyzer module/SuperHyway mapping on
page 251).
DM.PL_FRZ
0x100080
Field Bits Size Volatile? Synopsis Type
FREEZE_X [15:0] 16 ✓ Bus master freeze control RW
Operation
When read
When written
HARD reset 0
A value of 1 in this field inhibits the bus request signal for the
corresponding SuperHyway bus master, stopping the bus
master from initiating any further bus transactions.
The freeze state can be set either by a watchpoint hit action or
by software writing to this field.
Returns 0 when the bus master is able to operate normally and
1 when it is frozen.
Sets or clears the freeze state.
Value - Description
0: unfrozen
1: frozen
D R A FT
Table 64: DM.PL_FRZ register definition
SuperH, Inc.
SH-5 System Architecture, Volume 3: Debug 05-SA-10003 v1.0