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SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA<br />

190 WP channel type PL<br />

DM.WP_PLx_CTRL<br />

where x= channel id<br />

Field Bits Size Volatile? Synopsis Type<br />

DEST_MSK [7:0] 8 — Watchpoint destination mask RW<br />

Operation<br />

When read<br />

When written<br />

HARD reset<br />

Defines which <strong>bit</strong>s in the DEST_VAL field must match for the<br />

watchpoint to trigger.<br />

A value of ‘1’ in a <strong>bit</strong> position causes the watchpoint comparator to<br />

ignore the corresponding <strong>bit</strong> of the DEST_VAL field, a value of ‘0’ in<br />

a <strong>bit</strong> position causes the watchpoint comparator include the <strong>bit</strong> in<br />

the comparison.<br />

Thus, a value of 0xFF causes the destination field in each<br />

transaction to be ignored and the watchpoint will match all<br />

destinations.<br />

It is an implementation specific property as to whether the<br />

destination comparator is implemented.<br />

Returns current value<br />

Updates current value<br />

Undefined<br />

— [15:8] 8 — Reserved RES<br />

Operation<br />

Reserved<br />

When read Returns 0<br />

When written<br />

HARD reset 0<br />

Ignored<br />

DEST_VAL [23:16] 8 — Watchpoint destination value RW<br />

Operation<br />

When read<br />

Combined with the DEST_MSK field and is matched against the<br />

destination field of each <strong>SuperH</strong>yway bus transaction.<br />

It is an implementation specific property as to whether the<br />

destination comparator is implemented.<br />

D R A FT<br />

Returns current value<br />

When written<br />

HARD reset<br />

Updates current value<br />

Undefined<br />

Table 67: DM.WP_PLx_CTRL register definition<br />

<strong>SuperH</strong>, Inc.<br />

<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 3: Debug 05-SA-10003 v1.0

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