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SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA<br />

112 Debug module<br />

DM.TRPTR 0x100050<br />

Field Bits Size Volatile? Synopsis Type<br />

— [63:32] 32 — Reserved RES<br />

Operation<br />

Reserved<br />

When read Returns 0<br />

When written<br />

HARD reset 0<br />

Ignored<br />

Table 33: DM.TRPTR definition<br />

1.8.13 DM.FIFO_0/DM.FIFO_1/DM.FIFO_2 (FIFO port register)<br />

The DM.FIFO_X registers allow debug software to read trace data from the debug<br />

module FIFO when the trace destination is in either “DM FIFO trace hold” mode or<br />

“circular DM FIFO” mode.<br />

Care should be taken to ensure that trace is not being generated whilst the trace is<br />

being extracted, as this can result in the loss of trace messages.<br />

Trace data is extracted one trace message at a time, 3 registers are used due to the<br />

maximum size of a trace entry (

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