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SuperH (SH) 64-bit RISC Series SH-5 System Architecture, Volume ...

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PRELIMINARY DATA<br />

Debug event actions 55<br />

DM.WP_nx_ACTION<br />

where<br />

n= {IA/OA/IV},<br />

x = channel ID (relative to N)<br />

Field Bits Size Volatile? Synopsis Type<br />

— [5:1] 5 — Reserved RES<br />

ACTION_CHAIN_<br />

ALTER<br />

Operation<br />

Reserved<br />

When read Returns 0<br />

When written<br />

HARD reset 0<br />

Ignored<br />

[7:6] 2 — Enable chain-latch alteration RW<br />

See the ACTION_CHAIN_ALTER field of Table 18 on page 49<br />

CHAIN_ID [11:8] 4 — Chain-latch ID RW<br />

This field should be set to the same value as corresponding CHAIN_ID field of<br />

Table 18 on page 49<br />

Table 19: DM.WP_{IA/OA/IV}x_ACTION register definition<br />

D R A FT<br />

05-SA-10003 v1.0<br />

<strong>SuperH</strong>, Inc.<br />

<strong>SH</strong>-5 <strong>System</strong> <strong>Architecture</strong>, <strong>Volume</strong> 3: Debug

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